Title :
Snubberless balancement in MOSFET stacks by signals gate synchronization with passive components
Author :
Guerrero-Guerrero, A.F. ; Ustariz-Farfan, A.J. ; Cano-Plata, E.A.
Author_Institution :
Electr., Electron. & Syst. Eng. Program, Univ. Nac. de Colombia, Manizales, Colombia
Abstract :
This paper presents a proposal of MOSFETs series and parallel connections. This configuration allows the increase of maximum operating voltage and current values in these circuit breakers. The unbalance compensation method is performed at the side gate from a single active driver circuit. The mathematical formulation is done and the results are validated through simulation. The main advantages and disadvantages and future applications in multilevel inverters are determined.
Keywords :
MOSFET circuits; driver circuits; field effect transistor switches; power MOSFET; power semiconductor switches; MOSFET stacks; active driver circuit; circuit breakers; maximum operating current; maximum operating voltage; parallel connected MOSFET; passive components; series connected MOSFET; signals gate synchronization; snubberless balancing; Capacitance; Insulated gate bipolar transistors; Inverters; Logic gates; MOSFET; Resistors; Switches; MOSFET; Switching devices; high voltage; power electronics; voltage unbalance;
Conference_Titel :
Power Electronics and Power Quality Applications (PEPQA), 2015 IEEE Workshop on
Conference_Location :
Bogota
DOI :
10.1109/PEPQA.2015.7168223
