A current-mode spiking neural classifier with lumped dendritic nonlinearity

We present the current mode implementation of a spiking neural classifier with lumped square law dendritic nonlinearity. It has been shown earlier that such a system with binary synapses can be trained with structural plasticity algorithms to achieve comparable classification accuracy with less synaptic resources than conventional algorithms. Hence, in our address event based implementation, we save 2-12X memory resources in storing connectivity information. The chip fabricated in 0.35μm CMOS has 8 dendrites per cell and uses two opposing cells per class to cancel common mode inputs. Preliminary results show the chip is functional and dissipates 30nW of static power per neuronal cell and 422pJ/spike.