A 3T or 4T pixel compatible DR extension technique suitable for 3D-IC imagers: A 800×512 and 5μm pixel pitch 2D demonstrator

Author

Peizerat, A. ; Guezzi, F. ; Benetti, M. ; Dupret, A. ; Jalby, R. ; de Sa, L. Bruno ; Guicquero, W. ; Blanchard, Y.

Author_Institution

LETI, CEA, Grenoble, France

fYear

2015

fDate

24-27 May 2015

Firstpage

1094

Lastpage

1097

Abstract

In this paper is presented a High Dynamic Range (HDR) extension technique that applies to an imager without modifying any of its other specifications (as speed, noise floor or pixel scheme). The technique relies on the division of the focal plane into blocks that are able to choose the integration time from a set of eleven exposures, reaching +60db extension compared to a standard CMOS imager. The exposure time of each block can also be controlled by an external frame buffer, paving the way to advanced bracketing techniques. This system has been explored with a proof of concept sensor fabricated in a 0.18μm CMOS process.

Keywords

CMOS image sensors; focal planes; three-dimensional integrated circuits; 2D demonstrator; 3D-IC imagers; 3T pixel compatible DR extension; 4T pixel compatible DR extension; CMOS process; advanced bracketing techniques; exposure time; external frame buffer; focal plane; high dynamic range; Computer architecture; Dynamic range; Floors; Image sensors; Signal to noise ratio; Standards; 3D-IC technology; High dynamic Range; image sensor; pixel;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2015 IEEE International Symposium on

Conference_Location

Lisbon

Type

conf

DOI

10.1109/ISCAS.2015.7168828

Filename

7168828