Linear programming of voltage-controlled memristors with an anti-serial memristor circuit

The memristance variation of a single memristor with voltage input is generally a nonlinear function of time. Linearization of memristance variation about time is very important for the easiness of memristor programming. In this paper, a method utilizing an anti-serial architecture for linear programming is addressed. The anti-serial architecture is composed of two memristors with opposite polarities. It linearizes the variation of memristance by virtue of complimentary actions of two memristors. For programming a memristor, additional memristor with opposite polarity is employed. The linearization effect of weight programming of an anti-serial architecture is investigated and memristor bridge synapse which is built with two sets of anti-serial memristor architecture is taken as an application example of the proposed method.