Title :
A 10 Gbps eye opening monitor in 65nm CMOS
Author :
Krishnan, Sandeep ; Pavan, Shanthi
Author_Institution :
Indian Inst. of Technol., Madras, Chennai, India
Abstract :
Monitoring the eye diagram at the output of an embedded analog adaptive equalizer used in a high speed serial link is challenging. Eye measurement using an external oscilloscope is problematic due to the bandwidth of the test setup. In this work, we describe the working principle and design details of a low cost, on-chip monitor circuit that enables the determination of the eye diagram. The eye opening monitor (EOM), implemented in a 65 nm CMOS process, occupies 0.06 mm2 and consumes 5.7 mW from a 1.2 V supply. Measurements demonstrate the efficacy of our techniques.
Keywords :
CMOS integrated circuits; adaptive equalisers; eye; oscilloscopes; CMOS process; bit rate 10 Gbit/s; embedded analog adaptive equalizer; external oscilloscope; eye diagram monitoring; eye measurement; eye opening monitor; high speed serial link; low cost monitor circuit; on-chip monitor circuit; power 5.7 mW; size 65 nm; voltage 1.2 V; Adaptive equalizers; CMOS process; Clocks; Delays; Monitoring; System-on-chip;
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
DOI :
10.1109/ISCAS.2015.7169325
