Design of a digital harmonic-cancelling sine-wave synthesizer with 100 MHz output frequency, 43.5 dB SFDR, and 2.26 mW power

An on-chip sine-wave synthesizer design with fast programmability and low hardware cost is presented. The design makes use of a harmonic cancellation technique to digitally synthesize an approximation to a sine-wave, which does not contain lower order harmonic distortions. The remaining higher order harmonics are attenuated with the use of a low pass filter (LPF) to synthesize a spectrally pure sine-wave. The simple nature of the sine-wave synthesis approach allows for a design with low hardware cost while maintaining high output spectral purity. The generic design of the aptly named digital harmonic-cancelling sine-wave synthesizer (DHSS) is discussed along with parasitic extracted simulation results from a prototype designed in a 0.13 μm CMOS process. Simulation results demonstrate that the DHSS prototype is capable of synthesizing up to 100 MHz output frequency, with 43.5 dB SFDR, while consuming only 2.26 mW of power.