DocumentCode
729315
Title
Graphene negative differential resistance (GNDR) circuit with enhanced performance at room temperature
Author
Sharma, P. ; Bernard, L.S. ; Bazigos, A. ; Magrez, A. ; Ionescu, A.M.
Author_Institution
Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland
fYear
2015
fDate
21-24 June 2015
Firstpage
267
Lastpage
268
Abstract
We propose and experimentally demonstrate a novel circuit based on graphene FETs (GFETs) showing excellent negative differential resistance (NDR) characteristics at room temperature. The proposed GNDR circuit exploits a closed loop connection of 1-GFET with a 2-GFET inverter, being highly scalable. The circuit is demonstrated using large-area chemical vapor deposition grown graphene and no doping step, which makes it compatible with silicon-based circuits. It exhibits improved peak-to-valley current ratio (PVCR), higher NDR level and wider voltage range over which NDR is valid, as compared to any previous graphene NDR. The NDR is uniquely tunable with the supply voltage as well as with back bias voltage. We show that PVCR of up to 2 can be achieved. In comparison to other NDR technologies, the graphene NDR has a high peak-current-density of the order of 1 mA/μm, which offers opportunities for designing circuits with high current drive.
Keywords
chemical vapour deposition; field effect transistors; graphene devices; negative resistance; 1-GFET; 2-GFET inverter; NDR characteristics; PVCR; graphene FET; large-area chemical vapor deposition grown graphene; loop connection; negative differential resistance characteristics; peak-current-density; peak-to-valley current ratio; room temperature; Electrical resistance measurement; Graphene; Inverters; Logic gates; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference (DRC), 2015 73rd Annual
Conference_Location
Columbus, OH
Print_ISBN
978-1-4673-8134-5
Type
conf
DOI
10.1109/DRC.2015.7175676
Filename
7175676
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