Abstract :
Summary form only given. Mixed-criticality embedded systems are getting more attention due to savings in cost, weight, and power, and fueled by the ever increasing performance of processers. Introduced into practice more than 2 decades ago -- e.g. in aerospace with the concept of time and space-partitioning -- optimization and different underlying hardware architectures like multicore processors continue to challenge system designers. This talk should present you a mix of different aspects of mixed-criticality system architecture and designs and underlying approaches of the past with excursions into real space, aerospace and railway systems. With the advent of multicore system-on-chip and multicore processors many of the original assumptions and solutions are challenged and sometimes invalidated and new problems emerge that require special attention. We will walk through current and future challenges and look at point solutions and discuss possible research needs. The interplay of safety, security, system design, performance optimization, scheduling aspects, and application needs and constraints combined with modern computing architectures like multicore processors provide a fertile ground for research and discussions in this field.
Keywords :
computer architecture; embedded systems; scheduling; security of data; system-on-chip; computing architectures; hardware architectures; mixed-criticality embedded systems; mixed-criticality system architecture; multicore processors; multicore system-on-chip; performance optimization; safety; scheduling aspects; security; system design;