Half-MOS Based Single-Poly EEPROM Cell With Program and Erase Bit Granularity

Author

Torricelli, Fabrizio ; Milani, Lili ; Colalongo, Luigi ; Richelli, Anna ; Kovacs-Vajna, Zsolt Miklos

Author_Institution

Dept. of Inf. Eng., Univ. of Brescia, Brescia, Italy

Volume

34

Issue

12

fYear

2013

fDate

Dec. 2013

Firstpage

1509

Lastpage

1511

Abstract

A single-poly electrically erasable programmable ROM (EEPROM) cell compatible with standard CMOS process is proposed. With respect to the classical embedded NOR cell, it can be programmed and erased by Fowler-Nordheim tunneling with single-bit granularity. The memory cell is based on a novel writing-inhibition scheme enabled by the combination of the body effect with multiple half-MOS devices. Experimental results on programming, erasing, inhibition, reading, and cycling endurance are provided using a 0.13 μm standard CMOS process.

Keywords

CMOS memory circuits; EPROM; Fowler-Nordheim tunneling; body effect combination; classical embedded NOR cell; cycling endurance; half-MOS based single-poly EEPROM cell; memory cell; program-erase bit granularity; single-bit granularity; single-poly electrically erasable programmable ROM cell; size 0.13 mum; standard CMOS process; writing-inhibition scheme; CMOS process; EPROM; Flash memory cells; Threshold voltage; Tunneling; Embedded flash; multiple-time programmable (MTP) memory; single-polysilicon electrically erasable programmable ROM (EEPROM);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2013.2285258

Filename

6650056