High Performance FPGA-Based DMA Interface for PCIe

Author

Kavianipour, Hossein ; Muschter, S. ; Bohm, Christian

Author_Institution

Dept. of Phys., Stockholm Univ., Stockholm, Sweden

Volume

61

Issue

2

fYear

2014

fDate

Apr-14

Firstpage

745

Lastpage

749

Abstract

We present a data communication suite developed for use in the Track Engine Trigger for the IceCube Neutrino Observatory at the South Pole. The suite is applicable to any bidirectional Direct Memory Access (DMA) transfer between FPGA logic and system memory on a host PC via PCIe. The suite contains a DMA controller firmware, test benches, a Linux driver and a user application for DMA and Peripheral Input/Output transfers (PIO) into on-FPGA memory modules and FIFOs. The DMA which is based on the Xilinx´ bus master DMA, produces measured transfer speeds up to 748 MB/s (read) and 784 MB/s (write) using the Xilinx VC707 Virtex-7 board. The hardware part of the suite has been verified on different circuit boards with different FPGAs.

Keywords

field programmable gate arrays; file organisation; peripheral interfaces; DMA interface; FPGA logic; IceCube Neutrino Observatory; Linux driver; PCIe; PIO; VC707 Virtex-7 board; Xilinx bus master; bidirectional direct memory access transfer; circuit boards; controller firmware; data communication suite; host PC; memory modules; peripheral input-output transfers; test benches; track engine trigger; user application; Engines; Field programmable gate arrays; Hardware; Linux; Resource management; Software; Timing; Data acquisition; FPGA; data communication; data transfer; linux; readout electronics; trigger;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2014.2304691

Filename

6786396