DocumentCode
729974
Title
A fully-hardwired implementation of large vocabulary continuous speech recognizer
Author
Yunjoo Kim ; Juyeob Kim ; Joohyun Lee ; Wonjong Kim
Author_Institution
SW-SoC Convergence Res. Div., Electron. & Telecommun. Res. Inst., Daejeon, South Korea
fYear
2015
fDate
24-26 June 2015
Firstpage
1
Lastpage
2
Abstract
This article presents the hardware implementation of the speech recognition for real time performance and high-level accuracy. The stand-alone speech recognizer should simultaneously achieve the requirements, which are the low-latency performance and the low-power dissipation in an environment that cannot connect to the network. So, we made a speech recognizer as the hardware accelerator based on the hidden Markov model for reducing the load of the system processor without the cloud computing. Our overall design has the fully hardwired operation flow from the generation of the speech feature to the generation of the recognized words. Our design showed low-latency performance as the real time factor of 0.4 ~ 0.5 on FPGA, which operates at 100MHz operating frequency and uses the resource of 10%.
Keywords
field programmable gate arrays; hidden Markov models; speech recognition; FPGA; cloud computing; frequency 100 MHz; fully-hardwired implementation; hardware accelerator; hidden Markov model; large vocabulary continuous speech recognizer; speech feature; speech recognition; system processor; Consumer electronics; FPGA; Hidden Markov Model; Speech Recognition;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics (ISCE), 2015 IEEE International Symposium on
Conference_Location
Madrid
Type
conf
DOI
10.1109/ISCE.2015.7177803
Filename
7177803
Link To Document