Heuristics in Physical Design Partitioning: A review

In the field of electronic design automation physical design of integrated circuits is one of the most interesting and challenging areas. During physical design, all design components are instantiated with their geometric representations and directly impacts circuit performance, area, reliability, power, and manufacturing yield. Due to its high complexity, physical design is split into several key steps. One of the vital stages of Physical Design is Partitioning in which a circuit is broken up into smaller sub-circuits or modules which can each be designed or analyzed individually, subject to design constraints such as maximum partition sizes and maximum path delay. In this paper, we study about the various heuristic approaches towards the circuit partitioning problems. We have also given a comparative analysis of different algorithms which have been proposed so far in solving this partitioning problem.