DocumentCode :
735279
Title :
A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS
Author :
Khayatzadeh, Mahmood ; Frustaci, Fabio ; Blaauw, David ; Sylvester, Dennis ; Alioto, Massimo
Author_Institution :
Univ. of Michigan-Ann Arbor, Ann Arbor, MI, USA
fYear :
2015
fDate :
17-19 June 2015
Abstract :
This work proposes an area-efficient approach to fully exploit redundancy in reconfigurable sense amplifiers (SAs). The proposed SA can combine/invert offsets of sub-unit SAs, reducing offset by up to 3.1× at iso-area in 28nm FDSOI.
Keywords :
CMOS integrated circuits; amplifiers; redundancy; silicon-on-insulator; FDSOI CMOS; offset reduction; reconfigurable sense amplifiers; redundancy; size 28 nm; sub-unit SA; Arrays; Capacitors; Layout; Random access memory; Redundancy; Semiconductor device measurement; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits (VLSI Circuits), 2015 Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-86348-502-0
Type :
conf
DOI :
10.1109/VLSIC.2015.7231284
Filename :
7231284
Link To Document :
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