Fully integrated DC-DC converter and a 0.4V 32-bit CPU with timing-error prevention supplied from a prototype 1.55V Li-ion battery

Author

Turnquist, Matthew ; Hiienkari, Markus ; Makipaa, Jani ; Jevtic, Ruzica ; Pohjalainen, Elina ; Kallio, Tanja ; Koskinen, Lauri

Author_Institution

Aalto Univ., Espoo, Finland

fYear

2015

fDate

17-19 June 2015

Abstract

We introduce an ultra-low-energy system comprised of a prototype 1.55V Li-ion battery, fully integrated switched-capacitor (SC) DC-DC 3:1 converter, and a 32-bit RISC CPU with timing-error prevention (TEP). The DC-DC converter and CPU are manufactured in 28nm UTBB FD-SOI. The DC-DC converter uses the battery´s flat discharge curve and low nominal voltage to achieve a peak efficiency of 85%. The CPU operates from 0.3V-0.5V and with energy as low as 4.9pJ/cyc. The battery, DC-DC converter, and CPU system is able to operate with an average energy of 8pJ/cyc over 95% of the battery´s discharge curve in the temperature range of -20^oC to 70^oC.

Keywords

DC-DC power convertors; reduced instruction set computing; secondary cells; silicon-on-insulator; switched capacitor networks; Li; RISC CPU; TEP; UTBB FD-SOI; efficiency 85 percent; flat discharge curve; fully depleted silicon-on-insulator; fully integrated SC DC-DC converter; lithium-ion battery; reduced instruction set computing; size 28 nm; switched-capacitor; temperature -20 C to 70 C; timing-error prevention; ultra-thin body and box; ultralow energy system; voltage 0.3 V to 0.5 V; voltage 0.4 V; voltage 1.55 V; word length 32 bit; Batteries; Battery charge measurement; Central Processing Unit; DC-DC power converters; Discharges (electric); Energy consumption; Prototypes;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits (VLSI Circuits), 2015 Symposium on

Conference_Location

Kyoto

Print_ISBN

978-4-86348-502-0

Type

conf

DOI

10.1109/VLSIC.2015.7231307

Filename

7231307