A linear response single exposure CMOS image sensor with 0.5e− readout noise and 76ke− full well capacity

A linear response single exposure CMOS image sensor approaching to the photon countable sensitivity and a high full well capacity (FWC) is developed using lateral overflow integration capacitor (LOFIC) architecture with dual gain column amplifiers, small floating diffusion (FD) capacitance (C_FD) and low noise in-pixel source follower (SF) signal readout technologies. The fabricated 5.5 μm pitch 360^H×1680^V pixel prototype image sensor exhibited 240 μV/e^- conversion gain (CG) with 76 ke^- FWC resulting in 0.5 e^-_rms readout noise and 104 dB dynamic range under room temperature operation.