DocumentCode
735332
Title
Challenges for high-density 16Gb ReRAM with 27nm technology
Author
Sills, Scott ; Yasuda, Shuichiro ; Calderoni, Alessandro ; Cardon, Christopher ; Strand, Jonathan ; Aratani, Katsuhisa ; Ramaswamy, Nirmal
Author_Institution
Micron Technology Inc., Boise, Idaho, USA
fYear
2015
fDate
17-19 June 2015
Abstract
Enabling a high-density ReRAM product requires: developing a cell that meets a stringent bit error rate, BER, at low program current, integrating the cell without material damage, and providing a high-drive selector at scaled nodes. We discuss ReRAM performance under these constraints and present a 16Gb, 27nm ReRAM capable of 105 cycles with BER < 7×10−5.
Keywords
Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits (VLSI Circuits), 2015 Symposium on
Conference_Location
Kyoto, Japan
Print_ISBN
978-4-86348-502-0
Type
conf
DOI
10.1109/VLSIC.2015.7231366
Filename
7231366
Link To Document