Title :
High-mobility high-Ge-content Si1−xGex-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width
Author :
Hashemi, P. ; Ando, T. ; Balakrishnan, K. ; Bruley, J. ; Engelmann, S. ; Ott, J.A. ; Narayanan, V. ; Park, D.-G. ; Mo, R.T. ; Leobandung, E.
Author_Institution :
IBM Research, Thomas J. Watson Research Center, 1101 Kitchawan Rd., Yorktown Heights, NY 10598, USA
Abstract :
We demonstrate scaled High-Ge-Content (HGC) SiGe-OI finFET with Ge up to 71%, using a CMOS-compatible approach. For the first time, aggressively scaled HGC relatively-tall fins with vertical sidewalls and sub-10nm widths have been demonstrated using an enhanced 3D-Ge-condensation technique. An improved Si-cap-free HK/MG process featuring optimized IL has been developed resulting in scaled EOT and impressive long channel SS=69mV/dec. The gate stack results in realization of enhancement-mode devices for Ge content ∼0.6. Moreover, long-channel mobility characteristics at scaled EOT as well as short-channel pMOS FinFETs with decent cut-off behavior and performance are demonstrated, for the first time. As a result, we report the highest HGC SiGe pMOS FinFET mobility of ∼300cm2/Vs at Ninv=1013cm−2 at scaled EOT=0.85nm.
Keywords :
FinFETs; Logic gates; Silicon; Silicon germanium; Substrates; Three-dimensional displays; Very large scale integration;
Conference_Titel :
VLSI Circuits (VLSI Circuits), 2015 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
978-4-86348-502-0
DOI :
10.1109/VLSIC.2015.7231382