• DocumentCode
    737662
  • Title

    Enabling High-Frequency High-Efficiency Non-Isolated Boost Converters With Quasi-Square-Wave Zero-Voltage Switching and On-Chip Dynamic Dead-Time-Controlled Synchronous Gate Drive

  • Author

    Jing Xue ; Hoi Lee

  • Author_Institution
    Electr. Eng. Dept., Univ. of Texas at Dallas, Richardson, TX, USA
  • Volume
    30
  • Issue
    12
  • fYear
    2015
  • Firstpage
    6817
  • Lastpage
    6828
  • Abstract
    This paper presents techniques to enable non-isolated boost converters to achieve high power efficiencies under high switching frequency and high-voltage conditions. A quasi-square-wave zero-voltage switching (QSW-ZVS) boost converter topology is proposed to achieve high-frequency soft switching without any coupled inductors in the power stage and, thus, minimize the switching power loss of the converter. An on-chip dynamic dead-time controller is developed to provide near-optimum dead time for power FETs during switching transitions under different output voltage and load current conditions in order to achieve ZVS with minimal body diode conduction loss of power FETs. A synchronous gate driver is also proposed to provide fast propagation delays and output signal rise/fall time, enabling megahertz operation of the converter. A hardware boost converter prototype is built with the synchronous gate driver circuitry implemented in a 0.5-μm high-voltage CMOS process. The proposed QSW-ZVS boost converter provides an output voltage of 150 V and delivers an output power of 130 W. The peak power efficiency of the proposed converter achieves 92.7% at the switching frequency of 1 MHz. Compared with state-of-the-art gate drivers, the worst-case propagation delay of the proposed synchronous gate driver is improved by at least 7.6 times. The operation frequency of the proposed non-isolated boost converter is also improved by at least 15 times compared with other state-of-the-art counterparts.
  • Keywords
    driver circuits; switching convertors; zero voltage switching; CMOS process; QSW-ZVS boost converter topology; fast propagation delays; hardware boost converter; high-frequency high-efficiency nonisolated boost converters; high-frequency soft switching; onchip dynamic dead-time controller; onchip dynamic dead-time-controlled synchronous gate drive; peak power efficiency; power FET; quasi-square-wave zero-voltage switching; synchronous gate driver; worst-case propagation delay; Capacitors; Field effect transistors; Inductors; Logic gates; Switches; Switching frequency; Zero voltage switching; Dynamic dead-time controller; Dynamic dead-time controller (DDTC); high-frequency boost converters; high-voltage (HV) synchronous gate driver; high-voltage synchronous gate driver; quasi-square-wave zero-voltage switching; quasi-square-wave zero-voltage switching (QSW-ZVS); zero-voltage switching (ZVS) technique; zero-voltage switching technique;
  • fLanguage
    English
  • Journal_Title
    Power Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0885-8993
  • Type

    jour

  • DOI
    10.1109/TPEL.2015.2389151
  • Filename
    7001718