Short-Channel Effects in Tunnel FETs

Author

Jianzhi Wu ; Jie Min ; Yuan Taur

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of California at San Diego, La Jolla, CA, USA

Volume

62

Issue

9

fYear

2015

Firstpage

3019

Lastpage

3024

Abstract

This paper investigates short-channel effects (SCEs) in double-gate tunnel FETs (TFETs) using an analytic model that includes depletion in the source. It is shown that the drain bias has a significant effect on the potential profile at the source when the channel length is reduced to below twice the scale length. The OFF-state current becomes a strong function of channel length. The subthreshold current slope is also degraded in short-channel TFETs to the extent that there is no region of <;60 mV/decade below a minimum channel length. The SCE also manifests itself in the finite-output conductance in the saturation region-a Drain-Induced Barrier Lowering-like effect in conventional MOSFETs.

Keywords

MOSFET; semiconductor device models; MOSFET; channel length; double-gate tunnel FET; drain bias; finite-output conductance; short-channel effects; subthreshold current slope; Analytical models; Doping; Heterojunctions; Logic gates; MOSFET; Semiconductor device modeling; Tunneling; Band-to-band tunneling; short-channel effect (SCE); tunnel FET (TFET); tunnel FET (TFET).;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2015.2458977

Filename

7180366