Title :
Unexpected Latch-Up Through CMOS Triple-Well Structures
Author :
Stockinger, Michael ; Secareanu, Radu
Author_Institution :
Freescale Semicond., Inc., Austin, TX, USA
Abstract :
Unexpected device interactions between ESD diodes and NMOS clamps in isolated P-well (triple well) have been observed. This can lead to an SCR-like I-V behavior in TLP measurements and poses a latch-up risk. The cause of this interaction is being analyzed using equivalent circuits with parasitic devices and by TCAD simulations.
Keywords :
CMOS integrated circuits; electrostatic discharge; integrated circuit reliability; CMOS triple well structures; ESD diodes; NMOS clamps; isolated P-well; unexpected device interactions; unexpected latch-up; Clamps; Earth Observing System; Electric potential; Electrostatic discharges; MOS devices; Resistance; Semiconductor diodes; CMOS; ESD; Latch-Up; TCAD; Triple Well; latch-up (LU); triple well;
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
DOI :
10.1109/TDMR.2015.2466532
