Leti-UTSOI2.1: A Compact Model for UTBB-FDSOI Technologies—Part II: DC and AC Model Description

Author

Poiroux, Thierry ; Rozeau, O. ; Scheer, Patrick ; Martinie, Sebastien ; Jaud, Marie-Anne ; Minondo, M. ; Juge, Andre ; Barbe, J.C. ; Vinet, Maud

Author_Institution

Leti, CEA, Grenoble, France

Volume

62

Issue

9

fYear

2015

Firstpage

2760

Lastpage

2768

Abstract

A detailed presentation of the latest version of Leti-UTSOI compact model is provided. Leti-UTSOI2 is the first available model able to describe the behavior of ultrathin body and BOX fully depleted silicon-on-insulator transistors in all bias configurations, including strong forward back bias. In this paper, compact modeling of intrinsic currents and charges, including all physical effects required to describe decananometer transistors, is detailed. This model is valid for all independent double-gate architectures, very accurate and feature excellent predictability over technological parameters.

Keywords

MOSFET; semiconductor device models; silicon-on-insulator; AC model description; BOX fully depleted silicon-on-insulator transistors; DC model description; Leti-UTSOI compact model; Leti-UTSOI2.1; Si; UTBB-FDSOI technology; all bias configurations; decananometer transistors; double-gate architectures; intrinsic charges; intrinsic currents; strong forward back bias; ultrathin body; Analytical models; Electric potential; Electrostatics; Logic gates; Mathematical model; Semiconductor device modeling; Transistors; Analytical models; SPICE; compact modeling; fully depleted silicon on insulator (FDSOI); independent double gate (IDG); semiconductor device modeling; ultrathin body and buried oxide (UTBB); ultrathin body and buried oxide (UTBB).;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2015.2458336

Filename

7185413