Title :
Thread Assignment of Multithreaded Network Applications in Multicore/Multithreaded Processors
Author :
Radojkovic, Petar ; Cakarevic, Vladimir ; Verdu, J. ; Pajuelo, Alex ; Cazorla, Francisco J. ; Nemirovsky, M. ; Valero, M.R.
Author_Institution :
Barcelona Supercomput. Center, Univ. Politec. de Catalunya, Barcelona, Spain
Abstract :
The introduction of multithreaded processors comprised of a large number of cores with many shared resources makes thread scheduling, and in particular optimal assignment of running threads to processor hardware contexts to become one of the most promising ways to improve the system performance. However, finding optimal thread assignments for workloads running in state-of-the-art multicore/multithreaded processors is an NP-complete problem. In this paper, we propose BlackBox scheduler, a systematic method for thread assignment of multithreaded network applications running on multicore/multithreaded processors. The method requires minimum information about the target processor architecture and no data about the hardware requirements of the applications under study. The proposed method is evaluated with an industrial case study for a set of multithreaded network applications running on the UltraSPARC T2 processor. In most of the experiments, the proposed thread assignment method detected the best actual thread assignment in the evaluation sample. The method improved the system performance from 5 to 48 percent with respect to load balancing algorithms used in state-of-the-art OSs, and up to 60 percent with respect to a naive thread assignment.
Keywords :
computational complexity; microprocessor chips; multi-threading; multiprocessing systems; optimisation; processor scheduling; BlackBox scheduler; NP-complete problem; UltraSPARC T2 processor; load balancing algorithms; multicore processors; multithreaded network applications; multithreaded processors; optimal assignment; optimal thread assignments; processor hardware; thread scheduling; Instruction sets; Interference; Message systems; Multithread processing; Resource management; Chip multithreading (CMT); performance modeling; process scheduling;
Journal_Title :
Parallel and Distributed Systems, IEEE Transactions on
DOI :
10.1109/TPDS.2012.311