Power Multiplexing for Thermal Field Management in Many-Core Processors

Author

Minki Cho ; Kersey, Chad ; Gupta, M.P. ; Sathe, N. ; Kumar, Sudhakar ; Yalamanchili, Sudhakar ; Mukhopadhyay, Saibal

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

Volume

3

Issue

1

fYear

2013

Firstpage

94

Lastpage

104

Abstract

This paper presents the effect of proactive spatiotemporal power multiplexing on the thermal field in many-core processors. Power multiplexing migrates the locations of active cores within a chip after each fixed time interval, referred to as the migration interval, to redistribute the generated heat and thereby reduce the peak temperature and spatial and temporal nonuniformity in the thermal field. Clock and supply gating is used to minimize the power of the deactivated cores. The control of the migration interval is studied considering a 256-core processor at the predictive 16-nm node to evaluate the conflicting impact of the migration interval on thermal field and system performance.

Keywords

clocks; microprocessor chips; thermal management (packaging); 256-core processor; active cores; clock; deactivated cores; many-core processors; migration interval; power multiplexing; size 16 nm; supply gating; thermal field management; Clocks; Cooling; Heating; Multiplexing; Program processors; Spatiotemporal phenomena; Thermal management; Dark silicon; many-core processor; performance; power multiplexing; thermal management;

fLanguage

English

Journal_Title

Components, Packaging and Manufacturing Technology, IEEE Transactions on

Publisher

ieee

ISSN

2156-3950

Type

jour

DOI

10.1109/TCPMT.2012.2220546

Filename

6363584