Influence of the Gate Height Engineering on the Intrinsic Parameters of UDG-MOSFETs With Nonquasi Static Effect

This paper presents the results of a systematic theoretical investigation on the impact of gate height on the analog and radio-frequency (RF) performances of underlap-FinFET devices. The conventional underlap-FinFETs offer lower on current (I_on) and higher distributed channel resistance (R_ch). This paper shows that a higher gate height improves both I_on and R_ch due to higher gate side-wall fringing fields. In this paper, the various figure of merits (FOMs) for analog applications of the underlap-FinFETs such as drain current (Ids), transconductance (g_m), transconductance generation factor (g_m/I_ds), output resistance (R_o), and intrinsic gain (g_mR_o) are systematically analyzed for different values of gate height and reported. The RF FOMs studied include intrinsic capacitances (C_gs, C_gd) and resistances (R_gs, R_gd), transport delay (τ_m), cutoff frequency (f_T), and the transit frequency of maximum available power gain (f_MAX). This paper clearly demonstrates that the gate height is a critical technology parameter in improving the analog performance of underlap-FinFETs.