DocumentCode
743343
Title
Activation Energies for Oxide- and Interface-Trap Charge Generation Due to Negative-Bias Temperature Stress of Si-Capped SiGe-pMOSFETs
Author
Guo Xing Duan ; Hatchtel, Jordan ; Xiao Shen ; En Xia Zhang ; Cher Xuan Zhang ; Tuttle, Blair R. ; Fleetwood, Daniel M. ; Schrimpf, Ronald D. ; Reed, Robert A. ; Franco, Jacopo ; Linten, Dimitri ; Mitard, Jerome ; Witters, Liesbeth ; Collaert, Nadine ; Ch
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Vanderbilt Univ., Nashville, TN, USA
Volume
15
Issue
3
fYear
2015
Firstpage
352
Lastpage
358
Abstract
We investigate negative-bias temperature instabilities in SiGe pMOSFETs with SiO2/HfO2 gate dielectrics. The measured activation energies for interface-trap charge buildup during negative-bias temperature stress are lower for SiGe channel pMOSFETs with SiO2/HfO2 gate dielectrics and Si capping layers than for conventional Si channel pMOSFETs with SiO2 gate dielectrics. Electron energy loss spectroscopy and scanning transmission electron microscopy images demonstrate that Ge atoms can diffuse from the SiGe layer into the Si capping layer, which is adjacent to the SiO2/HfO2 gate dielectric. Density functional calculations show that these Ge atoms reduce the strength of nearby Si-H bonds and that Ge-H bond energies are still lower, thereby reducing the activation energy for interface-trap generation for the SiGe devices. Activation energies for oxide-trap charge buildup during negative-bias temperature stress are similarly small for SiGe pMOSFETs with SiO2/HfO2 gate dielectrics and Si pMOSFETs with SiO2 gate dielectrics, suggesting that, in both cases, the oxide-trap charge buildup likely is rate-limited by hole tunneling into the near-interfacial SiO2.
Keywords
Ge-Si alloys; MOSFET; electron traps; hafnium compounds; hole traps; interface states; negative bias temperature instability; semiconductor device reliability; silicon; silicon compounds; Si; SiGe; SiO2-HfO2; activation energy; electron energy loss spectroscopy; gate dielectrics; interface trap generation; interface-trap charge generation; negative bias temperature instabilities; negative bias temperature stress; oxide-trap charge generation; pMOSFET; scanning transmission electron microscopy; Dielectrics; Hafnium compounds; Logic gates; MOSFET; Silicon; Silicon germanium; Stress; Activation energy; Density functional theory calculations; HfO 2; HfO2; NBTI; Oxide- and interface-trap charges; SiGe; activation energy; density functional theory calculations; oxide- and interface-trap charges;
fLanguage
English
Journal_Title
Device and Materials Reliability, IEEE Transactions on
Publisher
ieee
ISSN
1530-4388
Type
jour
DOI
10.1109/TDMR.2015.2442152
Filename
7118163
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