Elimination of poly-Si gate depletion for sub-65-nm CMOS technologies by excimer laser annealing

Author

Wong, Hiu Yung ; Takeuchi, Hideki ; King, Tsu-Jae ; Ameen, Michael ; Agarwal, Aditya

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA

Volume

26

Issue

4

fYear

2005

fDate

4/1/2005 12:00:00 AM

Firstpage

234

Lastpage

236

Abstract

Pulsed excimer laser annealing (ELA) is used to reduce the poly-Si gate depletion effect (to <0.1 nm). Low resistivity (0.58 mΩ·cm) and high active boron concentration (4×10²⁰ cm^-3) at the gate-oxide interface are achieved while preserving the gate oxide quality and avoiding boron penetration, to meet International Technology Roadmap for Semiconductors requirements for sub-65-nm CMOS technology nodes. ELA is compatible with high-κ dielectric (HfO₂) and results in significantly lower gate leakage current density as compared with rapid thermal annealing (RTA).

Keywords

CMOS integrated circuits; boron; excimer lasers; hafnium compounds; interface phenomena; laser beam annealing; leakage currents; nanotechnology; semiconductor device breakdown; silicon; B; HfO₂; Si; active boron concentration; boron penetration; gate leakage current density; gate-oxide interface; hafnium dioxide; high-K dielectric; low resistivity; poly-Si gate depletion; pulsed excimer laser annealing; sub-65-nm CMOS technology; Boron; CMOS technology; Crystalline materials; Dielectric materials; Hafnium oxide; Optical materials; Phonons; Rapid thermal annealing; Rapid thermal processing; Temperature; Boron penetration; excimer laser annealing (ELA); gate depletion; hafnium dioxide; high-;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2005.845502

Filename

1408027