Title :
On the electrical SOA of integrated vertical DMOS transistors
Author :
Moens, P. ; Reynders, K.
Author_Institution :
Technol. Res. & Dev., AMI Semicond. Belgium BVBA, Oudenaarde, Belgium
fDate :
4/1/2005 12:00:00 AM
Abstract :
The dependency of the electrical safe operating area (SOA) of an integrated vertical DMOS transistor on the layout as well as on the residual epitaxial thickness of the drift region, is experimentally investigated using transmission line pulsing experiments. Guidelines for optimizing the SOA without compromising the other device parameters are given.
Keywords :
MOS integrated circuits; MOSFET; circuit optimisation; transmission line theory; SOA optimization; active clamp; drift region; electrical safe operating area; integrated vertical DMOS transistors; residual epitaxial thickness; transmission line pulsing; Bipolar transistors; Clamps; Floods; Guidelines; Power transmission lines; Pulse measurements; Robustness; Semiconductor optical amplifiers; Transmission lines; Voltage; Active clamp; electrical safe operating area (SOA); transmission line pulsing (TLP); vertical DMOS (VDMOS);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2005.845497
