Quasi-static behavior of MOS devices in the freeze-out regime

Author

Divakaruni, R. ; Viswanathan, C.R.

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

Volume

42

Issue

1

fYear

1995

fDate

1/1/1995 12:00:00 AM

Firstpage

87

Lastpage

93

Abstract

The quasi-static CV curves (low-frequency C-V curves) measured in the freeze-out regime of MOS transistors result in peaks near the accumulation or inversion regions depending on the direction of the voltage sweep. In this paper, we report a study of these peaks in n- and p-channel CMOS transistors within and outside compensating wells. The peaks in the quasi-static CV curves are attributed to the capture of minority carriers near inversion by the interface states and the capture of majority carriers by the interface states near accumulation

Keywords

MOSFET; accumulation layers; characteristics measurement; interface states; inversion layers; minority carriers; CMOS transistors; accumulation regions; compensating wells; freeze-out regime; interface states; inversion regions; majority carriers; minority carriers; quasi-static CV curves; voltage sweep; Capacitance; Capacitance-voltage characteristics; Current measurement; Doping; Interface states; MOS devices; MOSFETs; Substrates; Temperature; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.370031

Filename

370031