DocumentCode :
746526
Title :
An efficient, low-cost I/O subsystem for network processors
Author :
Pnevinatikatos, D.N. ; Sourdis, Ioannis ; Vlachos, Kyriakos
Author_Institution :
Tech. Univ. of Crete, Greece
Volume :
20
Issue :
4
fYear :
2003
Firstpage :
56
Lastpage :
64
Abstract :
An efficient I/O subsystem enables cost-effective network processing. To improve high-speed data transfer, the I/O subsystem sends data directly into the processing core´s register file. An implementation of this subsystem in a single-chip network processor , the Pro3, can sustain advanced inspection firewall processing of 2.5-Gbps TCP traffic.
Keywords :
Internet; application specific integrated circuits; authorisation; microprocessor chips; telecommunication traffic; transport protocols; Internet; Pro3 processor; TCP traffic; application-specific microprocessors; cost-effective network processing; high-speed data transfer; inspection firewall processing; low-cost input output subsystem; network processors; register file; single-chip network processor; Clocks; Computer architecture; Data mining; Delay; Engines; Pipeline processing; Protocols; Reduced instruction set computing; Registers; Throughput;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2003.1214353
Filename :
1214353
Link To Document :
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