DocumentCode :
746544
Title :
The evolution of systemverilog
Author :
Rich, David I.
Author_Institution :
Synopsys
Volume :
20
Issue :
4
fYear :
2003
Firstpage :
82
Lastpage :
84
Keywords :
Analytical models; Automatic testing; Delay; Design automation; Hardware design languages; History; Libraries; Proposals; Standards Working Groups; System testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2003.1214355
Filename :
1214355
Link To Document :
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