Transconductance enhancement due to back bias for submicron NMOSFET

Author

Guo, Jyh-Chyurn ; Chang, Ming-Chien ; Chih-Yuan Lu ; Hsu, Charles Ching-Hsiang ; Chung, Steve Shao-Shiun

Author_Institution

Submicron Lab., ERSO/ITRI, Hsinchu, Taiwan

Volume

42

Issue

2

fYear

1995

Firstpage

288

Lastpage

294

Abstract

For the first time, a new phenomenon of transconductance enhancement due to back bias found in submicron MOSFET´s is reported. A two-dimensional numerical simulation has been performed to investigate the origin of this observation. The enhancement of the channel potential gradient is verified to be the main reason responsible for this anomalous transconductance enhancement effect. Moderate channel doping concentrations (5/spl times/10/sup 16//spl sim/5/spl times/10/sup 17/ cm/sup -3/), short channel lengths (submicron regime), and operation under small drain bias are three key conditions for the maximum transconductance enhancement due to the back bias to occur. A conventional linear I-V model, which employs an effective channel length defined by the source/drain metallurgical junctions and bias-independent source/drain extrinsic resistance is not able to predict such characteristics.<>

Keywords

MOSFET; doping profiles; numerical analysis; semiconductor device models; simulation; back bias; channel potential gradient; linear I-V model; moderate channel doping concentrations; short channel lengths; small drain bias operation; submicron NMOSFET; transconductance enhancement; two-dimensional numerical simulation; CMOS technology; Degradation; Doping; MOSFET circuits; Numerical simulation; Predictive models; Scattering; Surface resistance; Transconductance;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.370067

Filename

370067