DocumentCode :
746837
Title :
Modeling of tunneling P/E for nanocrystal memories
Author :
Compagnoni, Christian Monzio ; Ielmini, Daniele ; Spinelli, Alessandro S. ; Lacaita, Andrea L.
Author_Institution :
Dipt. di Elettronica. e Informazione, Politecnico di Milano, Milan, Italy
Volume :
52
Issue :
4
fYear :
2005
fDate :
4/1/2005 12:00:00 AM
Firstpage :
569
Lastpage :
576
Abstract :
This paper presents a detailed study of the program/erase (P/E) dynamics under uniform tunneling for nanocrystal (NC) memories. Calculating the potential profile and the tunneling currents across the dielectric barriers, we evaluate NC charging and discharging transients during P/E operations. The calculated P/E windows and times compare well with experimental data for memory cells with different oxide thicknesses. The model accounts for the typical features of threshold voltage (VT) shift as a function of applied gate voltage, and can be used as a valuable tool for optimizing the cell geometry and parameters for maximum performance.
Keywords :
flash memories; nanoelectronics; semiconductor device models; tunnelling; NC charging transient; NC discharging transient; applied gate voltage; cell geometry optimization; dielectric barriers; flash memories; memory cells; nanocrystal memories; potential profile; semiconductor device modeling; threshold voltage shift; tunneling current; tunneling program-erase dynamics; uniform tunneling; Dielectrics; Dynamic programming; Flash memory; Hot carrier injection; Hot carriers; Nanocrystals; Nonvolatile memory; Solid modeling; Threshold voltage; Tunneling; Flash memories; nanocrystal (NC) memories; semiconductor device modeling; tunneling;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2005.845150
Filename :
1408160
Link To Document :
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