Title :
Integration of PtSi-based Schottky-barrier p-MOSFETs with a midgap tungsten gate
Author :
Larrieu, Guilhem ; Dubois, Emmanuel
Author_Institution :
UMR Centre Nat. de Recherche Scientifique, CNRS, Villeneuve d´´Ascq, France
Abstract :
This paper demonstrates the successful integration of Schottky barrier (SB) MOSFETs that feature platinum silicide (PtSi) source/drain and a tungsten midgap gate down to a length of 40 nm. SB MOSFETs are shown to steadily progress with respect to conventional highly doped source/drain with a current drive (Ion) of 325-425 μA/μm, an off-state current (Ioff) of 14-368nA/μm at -2 V for 100-40 nm physical gate lengths, respectively. Post-silicidation thermal treatments necessary to passivate defects at the silicon/silicon dioxide interface are shown to negatively impact electrical performance of short channel devices due to an increase of the SB to holes. Device simulation corroborates the increased sensitivity of the current drive to the modulation of the SB as the gate length is scaled down.
Keywords :
MOSFET; Schottky barriers; Schottky gate field effect transistors; heat treatment; nanotechnology; passivation; platinum compounds; semiconductor device models; silicon; silicon compounds; silicon-on-insulator; tungsten; -2 V; 40 nm; 40 to 100 nm; PtSi; Schottky-barrier p-MOSFET; Si-SiO2; device simulation; passivation; platinum silicide source-drain; post-silicidation thermal treatment; short channel devices; tungsten midgap gate; CMOS technology; Dielectrics; Germanium silicon alloys; MOSFET circuits; Platinum; Schottky barriers; Silicides; Silicon on insulator technology; Substrates; Tungsten; Deep level defects; Schottky barrier (SB) MOSFET; metal gate; silicon-on-insulator (SOI);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2005.859703