DocumentCode :
747731
Title :
Corrections to "Enhancing the reliability of wafer level packaging by using solder joints layout design"
Author :
Chang-Ming Liu ; Chang-Chun Lee ; Kuo-Ning Chiang
Author_Institution :
Adv. Packaging Res. Center, Nat. Tsing Hua Univ., Hsinchu
Volume :
30
Issue :
1
fYear :
2007
fDate :
3/1/2007 12:00:00 AM
Firstpage :
190
Lastpage :
190
Abstract :
In the original paper (see ibid., vol.29, no.4, p.877-85, Dec. 2006) the photographs of authors Chang-Ming Liu and Chang-Chun Lee were inadvertently switched in the biography section. The correct placement is shown here.
Keywords :
reliability; soldering; wafer level packaging; reliability; solder joints layout design; wafer level packaging; Biographies; Electronics packaging; Laboratories; Mechanical engineering; Micromechanical devices; Paper technology; Power engineering computing; Soldering; Solids; Wafer scale integration;
fLanguage :
English
Journal_Title :
Components and Packaging Technologies, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-3331
Type :
jour
DOI :
10.1109/TCAPT.2006.890539
Filename :
4135400
Link To Document :
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