• DocumentCode
    749913
  • Title

    Differential pair transconductor linearisation via electronically controlled current-mode cells

  • Author

    Szczepanski, S. ; Jakusz, J.

  • Author_Institution
    Tech. Univ. of Gdansk, Poland
  • Volume
    28
  • Issue
    12
  • fYear
    1992
  • fDate
    6/4/1992 12:00:00 AM
  • Firstpage
    1093
  • Lastpage
    1095
  • Abstract
    Use of the linearising current-mode cell (LCMC) concept is presented to design highly linear differential pair transconductors compatible with standard CMOS technology. The linearity an input voltage range of the proposed circuits are significantly improved over those of the conventional source-coupled differential pair biased by a current sink. The SPICE simulation results show that, for a power supply of +or-5 V, the linearity error is less than 0.2 Omega over +or-4 V differential input range.
  • Keywords
    CMOS integrated circuits; circuit analysis computing; constant current sources; linear integrated circuits; linearisation techniques; CMOS technology; SPICE simulation; electronically controlled current-mode cells; input voltage range; linear differential pair transconductors; linearising current mode cell concept; linearity error;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19920691
  • Filename
    141137
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=749913