Title :
IC reliability simulation
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fDate :
3/1/1992 12:00:00 AM
Abstract :
The motivation and challenges of IC reliability simulation are discussed. The reliability simulator BERT is used to illustrate the physical models and approaches used to simulate the hot-electron effect, oxide time-dependent breakdown, electromigration, and bipolar transistor gain degradation
Keywords :
circuit analysis computing; circuit reliability; digital simulation; electric breakdown of solids; electromigration; hot carriers; integrated circuit technology; monolithic integrated circuits; semiconductor device models; BERT; Berkeley-reliability tool; IC reliability simulation; bipolar transistor gain degradation; electromigration; hot-electron effect; oxide time-dependent breakdown; physical models; semiconductor ICs; Bit error rate; Circuit simulation; Circuit synthesis; Circuit testing; Computational modeling; Degradation; Electric breakdown; Failure analysis; Integrated circuit modeling; Solid modeling;
Journal_Title :
Solid-State Circuits, IEEE Journal of
