• DocumentCode
    751311
  • Title

    A power-efficient channel coder/decoder chip for GSM terminals

  • Author

    Busschaert, Hans J. ; Reusens, Peter P. ; Van Wauwe, G. ; De Langhe, M. ; Van Camp, Ronny M A ; Gouwy, Christiaan M W ; Dartois, Luc

  • Author_Institution
    Alcatel Bell Telephone, Antwerp, Belgium
  • Volume
    27
  • Issue
    3
  • fYear
    1992
  • fDate
    3/1/1992 12:00:00 AM
  • Firstpage
    307
  • Lastpage
    313
  • Abstract
    A compact power- and computing-delay-efficient channel codec chip for the Pan-European digital cellular radio (GSM) system is presented. This key component for the hand-portable mobile station, mainly implementing GSM Recommendation 5.03 on a full duplex basis, is accomplished through a dedicated architecture and application tailored memories. An important effort was made to increase the testability of the design; the sequentiality, the low pin count, and the presence of embedded macro functions implied the need for internal scan and BIST techniques. Full scan design and self-test facilities, supported by automatic test pattern generating software, resulted in time- and coverage-efficient testing. The chip is fabricated in a double-metal 1.2-μm CMOS technology, using a cell-based design approach incorporating memory and programmable array macro blocks. A full-rate speech channel block is decoded in less than 1.8 ms and typical average in-system power consumption does not exceed 10 mW
  • Keywords
    CMOS integrated circuits; VLSI; automatic testing; built-in self test; cellular radio; codecs; decoding; digital integrated circuits; encoding; integrated circuit testing; transceivers; 1.2 micron; 10 mW; BIST techniques; CMOS technology; GSM Recommendation 5.03; GSM terminals; Pan-European digital cellular radio; application tailored memories; automatic test pattern generating software; cell-based design; channel coder/decoder chip; computing-delay-efficient; dedicated architecture; design testability; double-metal; full duplex basis; hand-portable mobile station; internal scan; power efficient IC; programmable array macro blocks; self-test facilities; Application software; Built-in self-test; CMOS technology; Codecs; Computer architecture; Decoding; GSM; Land mobile radio cellular systems; Sequential analysis; Test pattern generators;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.121552
  • Filename
    121552