DocumentCode :
751498
Title :
High voltage SOI SJ-LDMOS with dynamic buffer
Author :
Wang, W.L. ; Zhang, B. ; Chen, W.J. ; Li, Z.J.
Author_Institution :
State Key Lab. of Electron. thin films & integrated devices, Univ. of Electron. Sci. & Technol. of China, Chengdu
Volume :
45
Issue :
9
fYear :
2009
Firstpage :
478
Lastpage :
480
Abstract :
A new buffered super junction (SJ) LDMOS on silicon-on-insulator (SOI) is proposed to eliminate the substrate-assisted depletion effect. The trenched buried oxide is self-adaptive to collect the additional charges according to the variable electric field strength, which forms a dynamic buffer between the SJ and the substrate. The collected charges compensate the N pillars, resulting in the charge balance between N and P pillars of the S J. Numerical simulation results indicate that the proposed device features high breakdown voltage and low on-resistance.
Keywords :
MOS integrated circuits; electric breakdown; electric resistance; semiconductor junctions; silicon-on-insulator; breakdown voltage; buffered super junction LDMOS; charge balance; self-adaptive trenched buried oxide; silicon-on-insulator; substrate-assisted depletion effect; variable electric field strength;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el.2009.3748
Filename :
4840308
Link To Document :
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