DocumentCode
751632
Title
A CMOS four-channel×1K time memory LSI with 1-ns/b resolution
Author
Arai, Yasuo ; Matsumura, Tsuneo ; Endo, Ken-ichi
Author_Institution
KEK, Nat. Lab. for High Energy Phys., Ibaraki, Japan
Volume
27
Issue
3
fYear
1992
fDate
3/1/1992 12:00:00 AM
Firstpage
359
Lastpage
364
Abstract
A four-channel 1024-b time-to-digital converter chip, which records input signals to memory cells at 1-ns intervals, has been developed. To achieve 1-ns precision, the chip incorporates a feedback stabilized delay element. The chip was fabricated on a 5.0-mm×5.6-mm die using 0.8-μm CMOS technology. It dissipates only 7 mW/channel under typical operating conditions
Keywords
CMOS integrated circuits; delay lines; integrated memory circuits; large scale integration; position sensitive particle detectors; time measurement; 0.8 micron; 1 ns; 28 mW; 4 kbit; 5 mm; 5.6 mm; CMOS; LSI; feedback stabilized delay element; four channel memory; memory; time memory cells; time-to-digital converter chip; CMOS technology; Circuits; Clocks; Delay effects; Detectors; Laboratories; Large scale integration; Particle tracking; Signal resolution; Timing;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.121558
Filename
121558
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