DFT and BIST of a multichip module for high-energy physics experiments

Author

Benso, Alfredo ; Chiusano, Silvia ; Prinetto, Paolo

Author_Institution

Politecnico di Torino, Italy

Volume

19

Issue

3

fYear

2002

Firstpage

92

Lastpage

103

Abstract

Engineers at Politecnico di Torino designed a multichip module for high-energy physics experiments conducted on the Large Hadron Collider. An array of these MCMs handles multichannel data acquisition and signal processing. Testing the MCM from board to die level required a combination of DFT strategies

Keywords

application specific integrated circuits; boundary scan testing; built-in self test; colliding beam accelerators; data acquisition; design for testability; field programmable gate arrays; high energy physics instrumentation computing; multichip modules; nuclear electronics; particle calorimetry; readout electronics; silicon radiation detectors; storage rings; synchrotrons; ASIC; BIST; Compact Muon Solenoid experiment; DFT strategies; FPGA-based test processor; Large Hadron Collider; board to die level testing; boundary scan logic; calorimetric readout system; design reusability; electromagnetic calorimeter; functional chip test; high-energy physics experiments; horizontal reuse; interconnect tests; multichannel data acquisition; multichannel signal processing; multichip module; online testing; readout systems; silicon detectors; vertical reuse; Built-in self-test; Data acquisition; Design for testability; Detectors; Mesons; Multichip modules; Optical fibers; Physics; Poles and towers; Solenoids;

fLanguage

English

Journal_Title

Design & Test of Computers, IEEE

Publisher

ieee

ISSN

0740-7475

Type

jour

DOI

10.1109/MDT.2002.1003804

Filename

1003804