DocumentCode :
752513
Title :
Characterization of multiple-bit errors from single-ion tracks in integrated circuits
Author :
Zoutendyk, J.A. ; Edmonds, L.D. ; Smith, L.S.
Author_Institution :
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
Volume :
36
Issue :
6
fYear :
1989
fDate :
12/1/1989 12:00:00 AM
Firstpage :
2267
Lastpage :
2274
Abstract :
The spread of charge induced by an ion track in an integrated circuit and its subsequent collection at sensitive nodal junctions can cause multiple-bit errors. The authors have experimentally and analytically investigated this phenomenon using a 256-kb dynamic random-access memory (DRAM). The effects of different charge-transport mechanisms are illustrated, and two classes of ion-track multiple-bit error cluster are identified. It is demonstrated that ion tracks that hit a junction can affect the lateral spread of charge, depending on the nature of the pull-up load on the junction being hit. Ion tracks that do not hit a junction allow the nearly uninhibited lateral spread of charge
Keywords :
MOS integrated circuits; VLSI; integrated circuit technology; integrated memory circuits; radiation hardening (electronics); random-access storage; 256 kbit; DRAM; SEU immunity; characterisation; charge-transport mechanisms; dynamic random-access memory; integrated circuits; ion-track multiple-bit error cluster; multiple-bit errors; single-ion tracks; spread of charge; Capacitance; Capacitors; Image restoration; Integrated circuit technology; Ion implantation; Propulsion; Random access memory; Scanning electron microscopy; Silicon; Voltage;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/23.45434
Filename :
45434
Link To Document :
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