Title :
The superscalar architecture of the MC68060
Author :
Circello, Joe ; Edgington, Greg ; McCarthy, Dan ; Gay, James ; Schimke, David ; Sullivan, Steven ; Duerden, Richard ; Hinds, Chris ; Marquette, D. ; Sood, Lal ; Couch, A. ; Chow, Daniel
Author_Institution :
Motorola Inc., Phoenix, AZ, USA
fDate :
4/1/1995 12:00:00 AM
Abstract :
As the newest member of the 68000 microprocessor family, the MC68060 microprocessor offers a cost-effective, power-thrifty solution for high-performance embedded processing applications. This article focuses on its microarchitectural features, such as superscalar pipeline implementation, that enable it to achieve its high-performance objectives while maintaining 68000 user-code compatability. Running at 50 and 66 MHz, the first 3.3V implementations achieve 103 Dhrystone MIPS performance at 66 MHz
Keywords :
microprocessor chips; pipeline processing; 66 MHz; MC68060 microprocessor; high-performance embedded processing; high-performance objectives; microarchitectural features; superscalar architecture; superscalar pipeline implementation; Artificial intelligence; CMOS process; CMOS technology; Frequency; Hardware; Microarchitecture; Microprocessors; Pipelines; Process design; Testing;
Journal_Title :
Micro, IEEE
