• DocumentCode
    753323
  • Title

    On effective slack management in postscheduling phase

  • Author

    Srivastava, Ankur ; Memik, Seda Ogrenci ; Choi, Bo Kyung ; Sarrafzadeh, Majid

  • Author_Institution
    Electr. & Comput. Eng. Dept., Univ. of Maryland, College Park, MD, USA
  • Volume
    24
  • Issue
    4
  • fYear
    2005
  • fDate
    4/1/2005 12:00:00 AM
  • Firstpage
    645
  • Lastpage
    653
  • Abstract
    In this paper, we propose techniques for effective slack management in high-level synthesis. Our design methodology improves the usability of slack. This manifests itself in the form of relaxed latency constraints on resources. Relaxed latency constraints could be exploited to generate designs with better power, area, routability, and other measures. The slack-management engine has two key components: delay budgeting and resource binding. We propose a left edge traversal-based algorithm for delay budgeting. For resource binding, we developed an algorithm that applies a locally optimal binding procedure at each clock step. In order to demonstrate the effectiveness of our strategy, we built an experimental flow that integrated SUIF, Synopsys Design Compiler, Cadence Silicon Ensemble, and our own optimization tools. Experiments with the MediaBench suite shows that our methodology could generate designs with better quality than designs and faster design closure when compared with designs generated without slack management.
  • Keywords
    delays; high level synthesis; integrated circuit design; processor scheduling; resource allocation; delay budgeting; design closure; high-level synthesis; left edge traversal-based algorithm; optimal binding; postscheduling phase; relaxed latency constraints; resource binding; slack management; Area measurement; Clocks; Delay; Design methodology; Engines; High level synthesis; Power generation; Power measurement; Silicon; Usability; Design closure; high-level synthesis; slack management;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2005.844115
  • Filename
    1411941