Design of Baseband Digital Delta-Sigma Modulators in 180nm CMOS

This article presents a 3rd Order 1-bit ΔΣ modulator optimized for applications requiring high effective resolution and linearity within the 20-kHz band. Furthermore, this work also describes architectural approaches for designing modulators with different order, oversampling rate, and number of quantization bits. Such approaches can be leveraged in a variety of applications in digital signal processing for data communications, filters, motor controllers, data acquisition, high-fidelity audio, DACs, and others operating in baseband. The 3rd Order modulator was implemented in standard 180nm CMOS; experimental measurements show a SNDR=126dB equivalent to 20-bits of effective resolution with a total harmonic distortion THD=0.03%. The circuit is able to operate in low-voltage conditions from 0.55 to 1.8 Volts.