Title :
Efficient recursive multiply architecture for FPGAs
Author :
Perri, S. ; Corsonello, P. ; Cocorullo, G.
Author_Institution :
Dept. of Electron., Univ. of Calabria, Rende, Italy
Abstract :
A new methodology for realising efficient multiply architectures for FPGAs is presented. The proposed strategy can be recursively applied to realise larger multipliers. Compared to proprietary macroblocks usually furnished within FPGA development tools, the new approach is more than 45% cheaper and more than 25% faster.
Keywords :
circuit CAD; field programmable gate arrays; logic design; multiplying circuits; FPGA; field programmable gate array; recursive multiply architecture;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20053313
