A layout synthesis methodology for array-type analog blocks

Author

Van der Plas, Geert ; Vandenbussche, Jan ; Gielen, Georges G E ; Sansen, Willy

Author_Institution

Dept. of Electr. Eng., Katholieke Universiteit Leuven, Leuven-Heverlee, Belgium

Volume

21

Issue

6

fYear

2002

fDate

6/1/2002 12:00:00 AM

Firstpage

645

Lastpage

661

Abstract

A methodology is presented for the physical design automation of array-type analog blocks such as encountered in high-speed data converters and other analog circuits. The approach takes into consideration typical analog constraints and offers full flexibility. A three-step procedure (floorplanning, symbolic routing, and technology mapping), of which the last two steps have been automated in a tool called Mondriaan, solves the layout synthesis problem in a fast and technology-independent way. A set of bus and tree device generators complements the tool set. Industrial-strength examples prove that the proposed solution speeds up the generation of high-quality analog layouts significantly

Keywords

analogue processing circuits; cellular arrays; circuit layout CAD; data conversion; integrated circuit layout; network routing; Mondriaan; analog constraints; array-type analog blocks; floorplanning; high-quality analog layouts; high-speed data converters; layout synthesis methodology; layout synthesis problem; physical design automation; symbolic routing; technology mapping; technology-independent way; three-step procedure; tree device generators; Analog circuits; Cellular neural networks; Circuit synthesis; Computer architecture; Design automation; Helium; Product design; Productivity; Programmable logic arrays; Routing;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/TCAD.2002.1004309

Filename

1004309