DocumentCode :
754497
Title :
Multilevel cooperative search for the circuit/hypergraph partitioning problem
Author :
Ouyang, Min ; Toulouse, Michel ; Thulasiraman, Krishnaiyan ; Glover, Fred ; Deogun, Jitender S.
Author_Institution :
Synopsys Inc., Mountain View, CA, USA
Volume :
21
Issue :
6
fYear :
2002
fDate :
6/1/2002 12:00:00 AM
Firstpage :
685
Lastpage :
693
Abstract :
The objectives in this paper are twofold: design an approach for the netlist partitioning problem using the cooperative multilevel search paradigm introduced by Toulouse et al. and study the effectiveness of this paradigm for solving combinatorial optimization problems, in particular, those arising in the very large scale integration (VLSI) computer-aided design (CAD) area. The authors present a cooperative multilevel search algorithm CoMHP and describe a parallel implementation on the SGI O2000 system. Experiments on ISPD98 benchmark suite of circuits show, for four-way and eight-way partitioning, a reduction of 3% to 15% in the size of hyperedge cuts compared to those obtained by hMETIS. Bisections of hypergraphs based on the algorithm also outperform hMETIS, although more modestly. The authors present experimental results to demonstrate that the cooperation scheme plays a key role in the performance of CoMHP. In fact, the improvement in the quality of the solutions produced by CoMHP is to a large extent independent of the partitioners used in the implementation of CoMHP. The experimental results also demonstrate the effectiveness of the cooperative multilevel search paradigm for solving the netlist partitioning problem
Keywords :
VLSI; circuit optimisation; cooperative systems; logic CAD; logic partitioning; multivalued logic circuits; network topology; parallel algorithms; CAD; CoMHP; ISPD98 benchmark suite; VLSI; circuit/hypergraph partitioning problem; combinatorial optimization problems; eight-way partitioning; hyperedge cuts; multilevel cooperative search; multilevel search strategy; netlist partitioning problem; parallel implementation; Algorithm design and analysis; Circuits; Clustering algorithms; Computer science; Concurrent computing; Design automation; Design optimization; Partitioning algorithms; Time sharing computer systems; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2002.1004312
Filename :
1004312
Link To Document :
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