Title :
A single-chip false target radar image generator for countering wideband imaging radars
Author :
Fouts, Douglas J. ; Pace, Phillip E. ; Karow, Christopher ; Ekestorm, Stig R T
Author_Institution :
Dept. of Electr. & Comput. Eng., Naval Postgraduate Sch., Monterey, CA, USA
fDate :
6/1/2002 12:00:00 AM
Abstract :
This paper describes the theory, design, implementation, simulation, and testing of an ASIC capable of generating false target radar images for countering wideband synthetic aperture and inverse synthetic aperture imaging radars. The 5.5 × 6.1 mm IC has 81632 transistors, 132 I/O pins, and consumes 0.132 W at 70 MHz from a 3.3-V supply. An introduction to the application and operation of the ASIC in an electronic attack system is also presented. The false target image is fully programmable and the chip is capable of generating images of both small and large targets, even up to the size of an aircraft carrier. This is the first reported use of all-digital technology to generate false target radar images of large targets
Keywords :
CMOS digital integrated circuits; VLSI; application specific integrated circuits; digital signal processing chips; electronic countermeasures; image reconstruction; military computing; military radar; programmable circuits; radar computing; radar imaging; realistic images; synthetic aperture radar; 0.132 W; 3.3 V; 70 MHz; T-SPICE simulation; all-digital technology; digital image synthesis; digital signal processing; electronic attack system; electronic warfare; false target radar image generator; full-custom VLSI CMOS; fully programmable; inverse synthetic aperture radar; pipeline register; radar countermeasures; ship defense; single-chip ASIC; synthetic aperture radar; virtual architecture; wideband chirp waveform; wideband imaging radar; Aerospace electronics; Electronic warfare; Image generation; Inverse synthetic aperture radar; Marine vehicles; Radar countermeasures; Radar imaging; Radar scattering; Signal synthesis; Synthetic aperture radar;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2002.1004579