A three-level advanced static VAr compensator

Author

Ekanayake, J.B. ; Jenkins, Michael

Author_Institution

Inst. of Sci. & Technol., Manchester Univ.

Volume

11

Issue

1

fYear

1996

fDate

1/1/1996 12:00:00 AM

Firstpage

540

Lastpage

545

Abstract

An advanced static VAr compensator (ASVC) employing a three-level inverter has been investigated for three-phase applications. The paper describes the operating principles of the ASVC using an elementary single phase ASVC circuit. The construction of a hardware model of the three-phase, three-level ASVC is then presented. The performance of the ASVC is obtained from an experimental study carried out on this laboratory model. The use of the selective harmonic elimination modulation (SHEM) technique to minimize harmonics is explored. Experimental studies have been carried out to determine the speed of response of the scheme by controlling it in a closed loop

Keywords

DC-AC power convertors; harmonic distortion; invertors; power system harmonics; static VAr compensators; applications; closed loop; hardware model; operating principles; performance; response speed; selective harmonic elimination modulation; three-level advanced static VAr compensator; three-level inverter; Capacitors; Circuits; Hardware; Inductors; Inverters; Power system harmonics; Reactive power; Reactive power control; Static VAr compensators; Voltage;

fLanguage

English

Journal_Title

Power Delivery, IEEE Transactions on

Publisher

ieee

ISSN

0885-8977

Type

jour

DOI

10.1109/61.484140

Filename

484140