• DocumentCode
    755197
  • Title

    Calibration-free 14b 70MS/s 0.13 μm CMOS pipeline A/D converters based on highmatching 3D symmetric capacitors

  • Volume
    43
  • Issue
    6
  • fYear
    2007
  • Firstpage
    35
  • Lastpage
    36
  • Abstract
    A 14b 70MS/s pipeline A/D converter (ADC) in a 0.13 mum CMOS process employs signal insensitive 3D fully symmetric capacitors for high matching accuracy without any calibration scheme. The prototype ADC with a die area of 3.3 mm2 shows measured differential and integral nonlinearities of 0.65LSB and 1.80LSB, respectively, at 14b
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; capacitors; 0.13 micron; 14 bit; 3D symmetric capacitors; CMOS pipeline A/D converters; CMOS process; differential nonlinearities; integral nonlinearities;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20070030
  • Filename
    4138081
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=755197